nativ

This app demonstrates dice cube detection and dots counting for each cube. Using OpenCV 3.4.13.

After processing the image is sent out via GigE Server.

net-gmbh/opencv_dice

nativ/cross

This The example uses no hardware acceleration.
But it uses the same infrastructure like other hardware accelerated examples.
remap_synview uses the function cv::remap from OpenCV.

After processing the image is sent out via GigE Server.

net-gmbh/iam_sw/

nativ/cross

The example sw_remap_boxfilter_synview uses the cv::remap and cv::boxfilter function from OpenCV. It demonstrates the execution of multiple sw- and hw-functions in different processing threads. The connection between the threads is established with two image-buffers. One is written, the other is read and vice versa.

After processing the image is sent out via GigE Server.

net-gmbh/iam_sw/

nativ/cross

The main processing consists of a simple Cc-code scaler for horizontal and vertical rescaling.

After processing the image is sent out via GigE Server.

net-gmbh/iam_appssw/

cross

The example code_synview uses HLS hw acceleration written in C-code.

The main processing method can be selected among following choices:

• no processing

• simple C-code software processing

• a optimized C-code version with ARM NEON instructions

• processing with OpenCV functions

• Hardware accelerated processing based on a C-code source

After processing the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

The example remap_synview uses the hardware acceleration function xf::cv::remap from the Vitis vision library.

After processing, the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

The example dice_synview demonstrates dice cube detection and dots counting for each cube. It uses multiple xfOpenCV functionsremap_boxfilter_synview uses the hw acceleration function xf::cv::remap from the Vitis vision library and the cv::remap and cv::boxfilter function from OpenCV.
It demonstrates the execution of multiple sw- and hw-functions in different processing threads. The connection between the threads is established with two image-buffers. One is written, the other is read and vice versa.

After processing, the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

This example uses RTL hardware acceleration written in Verilog.

After processing, the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

This example uses HLS hw acceleration with the xfOpenCV function xf::cv::boxfilter in the streaming path.
The module is located after the sensor interface and before the dma. The AXI-Stream data width convertion will be done by either axiStrm_wInc/axiStrm_wDec (HLS-implementation) or axiStrm_wInc_rtl/axiStrm_wDec_rtl (RTL-implementation).

After processing, the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

This example uses RTL hardware acceleration in the streaming path.
The module is located between sensor interface and dma.
It consists of a 32-bit master and 32-bit slave axi-stream interface for sensor pixel data and a 32-bit axi-lite control interface for register access.

After processing, the image is sent out via GigE Server.

net-gmbh/iam_apps/

cross

This example uses no hardware acceleration.
But it uses the same infrastructure like other hardware accelerated examples.
The main processing consists of a simple C-code scaler for horizontal and vertical rescaling.

After processing the image is sent out via GigE Server.

net-gmbh/iam_apps/

• Reference application for image classifier training and execution

• Different convolutional models are available (VGG, DenseNet, ResNet, Inception)

• Training code for transfer learning with Keras and Tensorflow

• Vitis Ai model conversion code

• iam application for image classification

net-gmbh/iam_ml/